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SoC Physical Design Engineer, PnR

Apple
Posted 17 hours ago, valid for a month
Location

Waltham, MA, US

Salary

Competitive

Contract type

Full Time

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Sonic Summary

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  • Apple is seeking a candidate for a physical design role focused on the implementation of design partitions for complex SoCs.
  • The position requires a minimum of a Bachelor's degree and at least 3 years of relevant industry experience.
  • Candidates should have recent successful tapeouts in deep submicron technology and strong knowledge of P&R implementation.
  • The role involves working closely with the logic design team, completing netlist to GDS2 implementations, and driving optimization for Power/Performance/Area.
  • Strong interpersonal skills and experience with industry-standard tools are essential for this position.
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hardworking people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product! In this visible role, you will be directly responsible for the physical implementation of design partition(s) (from netlist to tapeout) for a highly complex SoC utilizing innovative process technology.

Description


• Work with the logic design team to understand partition architecture and drive physical aspects early in the design cycle. • Complete netlist to GDS2 implementation for partition(s) meeting schedule and design goals. • Timing, physical and electrical verification, and driving the signoff closure for the partitions. • Resolve and improve design and flow issues related to physical design, identify potential solutions, and drive execution. • Drive optimization of PnR partitions, to achieve best Power/Performance/Area.

Minimum Qualifications


Minimum BS and 3+ years of relevant industry experience.

Preferred Qualifications


Recent successful tapeouts in deep submicron technology. Knowledgeable in partition level P&R implementation including floorplanning, clock & power distribution, timing closure, and physical & electrical verification. Strong knowledge of PD construction & analysis flows and methodology. Shown ability to execute to stringent schedule & die size requirements. Strong interpersonal skills. Experienced in industry standard tools and understanding their capabilities and underlying algorithms.



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